Dengtian Yang | Computer Science | Best Researcher Award

Mr. Dengtian Yang | Computer Science | Best Researcher Award

Student at Institute of Microelectronics of the Chinese Academy of Sciences, China

Yang Dengtian is a promising researcher in the field of Circuit and System, currently pursuing his Ph.D. at the Institute of Microelectronics of the Chinese Academy of Sciences. His research interests focus on hardware-software co-optimization, object detection, and hardware acceleration, with key contributions in developing post-processing accelerators for object detection and improving micro-architecture design for GPGPU. Yang’s project experience spans from UAV object detection to the design of System on Chip (SoC) and the deployment of deep learning models on specialized hardware like NVDLA IP. His dedication to advancing technology is reflected in his published works in renowned journals. Yang is a proactive learner, often sharing his findings on blogs, contributing to the academic communityā€™s growth. His work is poised to have a significant impact in fields such as artificial intelligence, hardware design, and computer vision.

Professional ProfileĀ 

Education

Yang Dengtian began his academic journey at Xiā€™an Jiaotong University, where he earned his Bachelor’s degree in Electronic Science and Technology in 2020. His strong foundational knowledge in electronics laid the groundwork for his current research. In 2020, he began his Ph.D. at the Institute of Microelectronics of the Chinese Academy of Sciences, specializing in Circuit and System. His doctoral research has primarily focused on hardware-software co-optimization and advanced object detection systems, areas that combine his deep understanding of both electronics and cutting-edge computing techniques. Yangā€™s education has been integral in shaping his research pursuits, allowing him to contribute valuable insights into hardware acceleration and the optimization of machine learning systems. His academic journey is ongoing, with an expected completion of his Ph.D. in 2025.

Professional Experience

Yang has worked on several innovative projects throughout his academic career. His recent project, “Learn and Improve Vortex GPGPU,” focuses on understanding GPGPU micro-architecture design and developing improvements for performance optimization. Another notable project was the “Post-Processing Accelerator for Object Detection,” where he investigated hardware-software co-optimization methods, contributing to the development of a unified accelerator system for object detection. In 2023, Yang worked on the “SoC Building and Yolox-Nano Network Deployment Based on NVDLA IP,” where he built an SoC with NVDLA IP and deployed a Yolox-Nano model on a specialized hardware platform. Yang has also worked on solutions to reduce off-chip memory accesses for CNN inference and deployed deep learning models using Vitis-AI. These experiences, along with his publications in renowned journals, highlight his advanced technical expertise and problem-solving abilities in cutting-edge electronics and AI research.

Research Interest

Yang Dengtianā€™s primary research interest lies in the intersection of Circuit and System design, hardware-software co-optimization, and artificial intelligence (AI). His work focuses on developing hardware accelerators for deep learning applications, particularly in object detection and micro-architecture optimization. He is passionate about creating more efficient systems for processing large-scale data, especially in environments that require real-time processing, such as unmanned aerial vehicles (UAVs) and embedded systems. Yangā€™s research includes developing GPGPU micro-architectures, improving System on Chip (SoC) designs, and enhancing the deployment of deep learning models on specialized hardware, such as NVDLA IP. His research aims to bridge the gap between hardware capabilities and software needs, making AI applications more accessible and efficient. He is particularly interested in creating unified frameworks for hardware-software co-design, which could significantly advance machine learning and computer vision technologies.

Awards and Honors

Yang Dengtianā€™s outstanding contributions to research have been recognized through various accolades. His publication in reputable journals, such as Information and IEICE Transactions on Information and Systems, demonstrates the impact of his work in the field of hardware and software co-optimization. While still early in his career, Yangā€™s commitment to research excellence has already led to numerous recognitions in his academic community. He has also been acknowledged for his innovative projects in hardware acceleration for AI applications, particularly in the development of post-processing accelerators for object detection. Yangā€™s work is a testament to his technical expertise and his potential for future awards as his research continues to make significant strides in the fields of electronics, AI, and machine learning. Given his promising trajectory, Yang is likely to receive further honors as his doctoral studies progress and his body of work grows.

Conclusion

Yang Dengtian is undoubtedly a strong contender for the Best Researcher Award due to his innovative approach to research, technical expertise, and significant contributions to the field of hardware-software co-design and optimization. His passion for learning, combined with his publications and project experience, highlights his potential to make substantial advancements in his area of study. However, expanding his collaborations and enhancing the practical impact of his research could further solidify his status as a leading researcher in the field.

Recommendation: Yang Dengtian is highly deserving of the Best Researcher Award, with his strengths outweighing areas for improvement. His future contributions are expected to have a lasting impact in the fields of object detection, hardware acceleration, and micro-architecture design.

Publications Top Noted

  • Title: Nano-carriers of combination tumor physical stimuli-responsive therapies
    Authors: W Jin, C Dong, D Yang, R Zhang, T Jiang, D Wu
    Journal: Current Drug Delivery
    Volume & Issue: 17 (7), 577-587
    Year: 2020
    Cited by: 7
  • Title: Object Detection Post Processing Accelerator Based on Co-Design of Hardware and Software
    Authors: D Yang, L Chen, X Hao, Y Zhang
    Journal: Information
    Volume & Issue: 16 (1), 63
    Year: 2025
    Cited by: Not yet cited (as of 2025)

 

Rajeev Ratna Vallabhuni | Computer Science | Young Scientist Award

Mr. Rajeev Ratna Vallabhuni | Computer Science | Young Scientist Award

Application Developer at Texans IT Services Inc., India

Rajeev Ratna Vallabhuni is an accomplished Application Developer with a rich background in computer science, technology, and engineering. He has contributed significantly to the field through several innovative patents in areas such as blockchain-based cloud applications, machine learning, and IoT security. His work spans various domains including AI/ML, image processing, and network management, with numerous research publications in international journals and conferences. With experience at Bayview Asset Management, LLC, he has a strong track record of applying cutting-edge technologies to real-world applications. His expertise in both academic and professional settings makes him a leading figure in the field of information technology and software development.

Professional ProfileĀ 

Education

Rajeev Ratna Vallabhuni holds a Master of Science in Information Technology Management from Campbellsville University, Kentucky, and a Master of Science in Computer Science Engineering from Northwestern Polytechnic University, California, USA. He also completed his Bachelor of Technology in Information and Technology at Vignan University, India. His educational foundation has equipped him with a diverse skill set, allowing him to specialize in software development, computer engineering, and cutting-edge technological innovations.

Professional Experience

Rajeev currently works as an Application Developer at Bayview Asset Management, LLC, where he plays a key role in developing and optimizing software applications. His previous professional experience includes working on various projects related to AI/ML, blockchain, and IoT security. He has contributed to numerous patents, book chapters, and international journal publications. Rajeev’s expertise spans both technical development and leadership, and his ability to integrate machine learning and deep learning techniques into practical solutions has made him a valuable asset in the tech industry.

Research Interest

Rajeev Ratna Vallabhuniā€™s research interests lie at the intersection of artificial intelligence, machine learning, cloud computing, and Internet of Things (IoT) technologies. His work primarily focuses on enhancing the security of IoT networks, leveraging blockchain for decentralized application architectures, and utilizing deep learning models for image and signal processing. Rajeev is also interested in exploring advanced computational methods for improving network management, resource allocation, and real-time data processing in cloud environments. His innovative research aims to develop scalable, efficient, and secure solutions for modern computing challenges, bridging the gap between theoretical algorithms and real-world applications.

Awards and Honors

Rajeev Ratna Vallabhuni has received numerous accolades for his contributions to the fields of software development, machine learning, and IoT security. Notable recognitions include multiple patents for his innovations in blockchain-based applications, AI/ML, and security systems. He has been awarded fellowships and scholarships during his academic career, showcasing his dedication to pushing the boundaries of technology. Additionally, Rajeev’s research has been published in prestigious international journals and recognized at numerous conferences, further cementing his reputation as a leading figure in his field.

Publications Top Noted

  • Smart cart shopping system with an RFID interface for human assistance
    Authors: RR Vallabhuni, S Lakshmanachari, G Avanthi, V Vijay
    Year: 2020
    Citation: 92
  • Performance analysis: D-Latch modules designed using 18nm FinFET Technology
    Authors: RR Vallabhuni, G Yamini, T Vinitha, SS Reddy
    Year: 2020
    Citation: 85
  • Disease prediction based retinal segmentation using bi-directional ConvLSTMU-Net
    Authors: BMS Rani, VR Ratna, VP Srinivasan, S Thenmalar, R Kanimozhi
    Year: 2021
    Citation: 68
  • ECG performance validation using operational transconductance amplifier with bias current
    Authors: V Vijay, CVSK Reddy, CS Pittala, RR Vallabhuni, M Saritha, M Lavanya, …
    Year: 2021
    Citation: 63
  • A Review On N-Bit Ripple-Carry Adder, Carry-Select Adder And Carry-Skip Adder
    Authors: V Vijay, M Sreevani, EM Rekha, K Moses, CS Pittala, KAS Shaik, …
    Year: 2022
    Citation: 62
  • Speech Emotion Recognition System With Librosa
    Authors: PA babu, VS Nagaraju, RR Vallabhuni
    Year: 2021
    Citation: 62
  • 6Transistor SRAM cell designed using 18nm FinFET technology
    Authors: RR Vallabhuni, P Shruthi, G Kavya, SS Chandana
    Year: 2020
    Citation: 60
  • Universal Shift Register Designed at Low Supply Voltages in 20nm FinFET Using Multiplexer
    Authors: RR Vallabhuni, J Sravana, CS Pittala, M Divya, BMS Rani, S Chikkapally, …
    Year: 2021
    Citation: 58
  • Numerical analysis of various plasmonic MIM/MDM slot waveguide structures
    Authors: CS Pittala, RR Vallabhuni, V Vijay, UR Anam, K Chaitanya
    Year: 2022
    Citation: 57
  • Design of Comparator using 18nm FinFET Technology for Analog to Digital Converters
    Authors: RR Vallabhuni, DVL Sravya, MS Shalini, GU Maheshwararao
    Year: 2020
    Citation: 55
  • High Speed Energy Efficient Multiplier Using 20nm FinFET Technology
    Authors: VR Ratna, S M, S N, V V, PC Shaker, D M, S Sadulla
    Year: 2021
    Citation: 53
  • Physically unclonable functions using two-level finite state machine
    Authors: V Vijay, K Chaitanya, CS Pittala, SS Susmitha, J Tanusha, …
    Year: 2022
    Citation: 48
  • Realization and comparative analysis of thermometer code based 4-bit encoder using 18 nm FinFET technology for analog to digital converters
    Authors: CS Pittala, V Parameswaran, M Srikanth, V Vijay, V Siva Nagaraju, …
    Year: 2021
    Citation: 45
  • Comparative validation of SRAM cells designed using 18nm FinFET for memory storing applications
    Authors: RR Vallabhuni, KC Koteswaramma, B Sadgurbabu, A Gowthamireddy
    Year: 2020
    Citation: 45